verilog - Identifying the files to which the following display statements will write -

//file output multi-channel descriptor module test;  integer handle1,handle2,handle3; //file handles  //open files initial begin    handle1 = $fopen("f1.out");    handle2 = $fopen("f2.out");     handle3 = $fopen("f3.out");  end  //display statements files initial begin //file output multi-channel descriptor    #5;    $fdisplay(4, "display statement # 1");    $fdisplay(15, "display statement # 2");    $fdisplay(6, "display statement # 3");    $fdisplay(10, "display statement # 4");    $fdisplay(0, "display statement # 5"); end endmodule 

i have been searching proper explanation problem. know have start first "initial" block -

initial
begin
handle1 = $fopen("f1.out"); //32'h 0000 0002
handle2 = $fopen("f2.out"); //32'h 0000 0004
handle3 = $fopen("f3.out"); //32'h 0000 0008
end

after have no idea how find files display statements write.need know how solve kind of problem.thanks.

each call $fopen returns 32-bit multi channel descriptor (mcd).

per verilog lrm:

the multichannel descriptor mcd 32 bit reg in single bit set indicating file opened. least significant bit (bit 0) of mcd refers standard output. output directed 2 or more files opened multichannel descriptors bitwise or-ing mcds , writing resultant value.

so after opening 3 files in example, direct output more 1 file doing this:

$fdisplay(handle1 | handle2, "write f1.out , f2.out"); $fdisplay(handle1 | 32'h00000001, "write f1.out , stdout"); 

if @ values passed $fdisplay in question, should able figure out bits set, , therefore files (including stdout) written to.